General-purpose Computer Research Articles

R-Blocks: an Energy-Efficient, Flexible, and Programmable CGRA

Emerging data-driven applications in the embedded, e-Health, and internet of things (IoT) domain require complex on-device signal analysis and data reduction to maximize energy efficiency on these energy-constrained devices. Coarse-grained reconfigurable architectures (CGRAs) have been proposed as a good compromise between flexibility and energy efficiency for ultra-low power (ULP) signal processing. Existing CGRAs are often specialized and domain-specific or can only accelerate simple kernels, which makes accelerating complete applications on a CGRA while maintaining high energy efficiency an open issue. Moreover, the lack of instruction set architecture (ISA) standardization across CGRAs makes code generation using current compiler technology a major challenge. This work introduces R-Blocks; a ULP CGRA with HW/SW co-design tool-flow based on the OpenASIP toolset. This CGRA is extremely flexible due to its well-established VLIW-SIMD execution model and support for flexible SIMD-processing, while maintaining an extremely high energy efficiency using software bypassing, optimized instruction delivery, and local scratchpad memories. R-Blocks is synthesized in a commercial 22-nm FD-SOI technology and achieves a full-system energy efficiency of 115 MOPS/mW on a common FFT benchmark, 1.45 × higher than a highly tuned embedded RISC-V processor. Comparable energy efficiency is obtained on multiple complex workloads, making R-Blocks a promising acceleration target for general-purpose computing.

The Role of the Supercomputer in the Modern World of Innovative Technologies

What is a supercomputer and why is it needed? What place does it occupy among computing equipment? Thanks to this article, we will determine the evolution and role of the supercomputer in the modern world and in the life of an average citizen. A supercomputer is a class of the most powerful computer systems available, which are evaluated in comparison with currently existing general purpose computer systems and the level of technology development. In general, the term "supercomputer" refers to a complex of server computers. All of them are connected to each other and work in parallel through a high-speed network. The similarity of a home computer and a supercomputer lies in their functions – data storage and processing, belonging to the same von Neumann architecture (the architecture of computing machines, the feature of which is the joint storage of data and machine commands in cells of the same memory). But the difference is huge in quantitative characteristics: these are the arrays of data that can be processed on these devices and the speed of performing the assigned tasks. By the way, a new unit of measurement – FLOPS – was proposed for measuring the speed of supercomputers. It is thanks to this value that performance is measured - the higher the number, the more powerful the computer is and which serves as the basis for ranking supercomputers. Today, supercomputers help solve a number of tasks in various fields – medicine, physics, mathematics, energy, etc. and are considered advanced computing technology. Traditionally, supercomputers are not considered rare: their development is ongoing and they bring a lot of benefits in many areas. In the future, powerful computing machines can become the main assistants in fields closely related to machine learning and artificial intelligence. Keywords: supercomputer, development evolution, computer architecture, FLOPS.

Heralded Three-Photon Entanglement from a Single-Photon Source on a Photonic Chip.

In the quest to build general-purpose photonic quantum computers, fusion-based quantum computation has risen to prominence as a promising strategy. This model allows a ballistic construction of large cluster states which are universal for quantum computation, in a scalable and loss-tolerant way without feed forward, by fusing many small n-photon entangled resource states. However, a key obstacle to this architecture lies in efficiently generating the required essential resource states on photonic chips. One such critical seed state that has not yet been achieved is the heralded three-photon Greenberger-Horne-Zeilinger (3-GHZ) state. Here, we address this elementary resource gap, by reporting the first experimental realization of a heralded 3-GHZ state. Our implementation employs a low-loss and fully programmable photonic chip that manipulates six indistinguishable single photons of wavelengths in the telecommunication regime. Conditional on the heralding detection, we obtain the desired 3-GHZ state with a fidelity 0.573±0.024. Our Letter marks an important step for the future fault-tolerant photonic quantum computing, leading to the acceleration of building a large-scale optical quantum computer.

Accelerating range minimum queries with ray tracing cores

Over the past decade, GPU technology has undergone a notable transformation, evolving from pure general-purpose computation to the integration of application-specific integrated circuits (ASICs), including Tensor Cores and Ray Tracing (RT) cores. While these specialized GPU cores were initially developed to enhance specific domains like AI and real-time rendering, recent research has successfully harnessed their capabilities to expedite other tasks traditionally reliant on conventional GPU computing. One GPU task that is still yet to find its way into RT cores is the processing of range minimum queries (RMQs) in parallel, which is fundamental in fields such as information retrieval or pattern matching, among others. In this context, accelerating RMQs with RT cores would impact many of the applications that heavily rely on this task. In this work we present RTXRMQ, a new approach that can compute RMQs with RT cores. The main contribution is the proposal of a geometric solution for RMQ, where elements become triangles that are placed and shaped according to the element’s value and position in the array, respectively, such that the closest hit of a ray launched from a point given by the query parameters corresponds to the result of that query. Experimental results show that RTXRMQ is currently best suited for small query ranges relative to the input size, achieving up to 5× and 2.3× of speedup over parallel state of the art CPU and GPU approaches, respectively. For medium and large query ranges RTXRMQ is still slower than the state of the art GPU approach, but still competitive by being 2.5× and 4× faster than a state of the art CPU method running in parallel as well. Furthermore, performance scaling experiments across the latest RTX GPU architectures show that if the current RT core scaling trend continues, then RTXRMQ’s performance would scale at a higher rate than the other compared approaches, making it an attractive tool for future high performance applications that employ many batches of RMQs.

Comparative study of CUDA-based parallel programming in C and Python for GPU acceleration of the 4th order Runge-Kutta method

In this paper, a comparative study is presented on the application of General-purpose Computing on Graphics Processing Units for solving the point reactor kinetics equations through the utilization of the 4th Order Runge-Kutta (RK4) method using the programming languages C and Python. Sequential and parallel algorithms of the RK4 method were developed in C/C++ and Python, with parallel algorithms specifically designed to operate on Graphics Processing Units (GPUs) utilizing the NVIDIA Compute Unified Device Architecture (CUDA) as the programming platform. As an experiment, the execution time for the sequential and parallel algorithms were compared for a reactivity value of ρ = 0.003 and a simulation time of t = 100 s. The parallel C and Python algorithms achieved, respectively, speedups of 9.33 and 409.7 when comparing the execution time on the best GPU utilized (RTX 3070Ti) with the best CPU (3600XT), while still maintaining numerical precision.

Optimizing convolutional neural networks for IoT devices: performance and energy efficiency of quantization techniques

AbstractThis document addresses some inherent problems in Machine Learning (ML), such as the high computational and energy costs associated with their implementation on IoT devices. It aims to study and analyze the performance and efficiency of quantization as an optimization method, as well as the possibility of training ML models directly on an IoT device. Quantization involves reducing the precision of model weights and activations while still maintaining acceptable levels of accuracy. Using representative networks for facial recognition developed with TensorFlow and TensorRT, Post-Training Quantization and Quantization-Aware Training are employed to reduce computational load and improve energy efficiency. The computational experience was conducted on a general-purpose computer featuring an Intel i7-1260P processor and an NVIDIA RTX 3080 graphics card used as an accelerator. Additionally, a NVIDIA Jetson AGX Orin was used as an example of an IoT device. We analyze the feasibility of training on an IoT device, the impact of quantization optimization on knowledge transfer-trained models and evaluate the differences between Post-Training Quantization and Quantization-Aware Training in such networks on different devices. Furthermore, the performance and efficiency of NVIDIA’s inference accelerator (Deep Learning Accelerator - DLA, in its 2.0 version) available at the Jetson Orin architecture are studied. We concluded that the Jetson device is capable of performing training on its own. The IoT device can achieve inference performance similar to that of the more powerful processor, thanks to the optimization process, with better energy efficiency. Post-Training Quantization has shown better performance, while Quantization-Aware Training has demonstrated higher energy efficiency. However, since the accelerator cannot execute certain layers of the models, the use of DLA worsens both the performance and efficiency results.

High Speed and Area Efficient Scalable n-Bit Digital Comparator

Abstract: The digital comparator is a crucial design element in various applications, including scientific computations. It is optimized for general-purpose computer architecture, memory addressing logic, queue buffers, and test circuits. High-speed comparators are essential for arithmetic operations, data sorting, and decision-making processes in digital systems. Area efficiency is crucial in integrated circuit design, as it minimizes the physical space a comparator occupies on a chip, reducing manufacturing costs and optimizing performance. The term "scalable" means the comparator can be adapted to handle different word lengths (n-bit), making it versatile for various applications. This project proposes an area-efficient n-bit digital comparator with high operating speed and low-power dissipation. The comparator structure consists of two modules: the Comparison Evaluation Module (CEM) and the Final Module (FM). The CEM involves the regular structure of repeated logic cells used for parallel prefix tree structure, while the FM validates the final comparison based on results from the CEM. The design is implemented using Tanner EDA in 45nm technology

An open-source application software for spatial prediction of permanent displacements in earthquake-induced landslides by the Newmark sliding block method: pyNewmarkDisp

This paper presents pyNewmarkDisp, an open-source application software developed in Python for calculating the spatial distribution of permanent displacements (up) in earthquake-triggered shallow landslides through the Newmark sliding block method. up are often estimated by simplified methods using empirical correlations instead of the direct Newmark method in which ground motion accelerations exceeding a critical value are integrated twice. These simplified procedures have traditionally been justified because of the time consumption, labor intensiveness, and impracticality of the direct Newmark method at large spatial scales. However, pyNewmarkDisp has a well-optimized code taking advantage of NumPy array operations and just-in-time Numba compilation that allows performing the direct Newmark method at large-scale spatial domains, even on general-purpose computers. pyNewmarkDisp is exemplified through a hypothetical study case, and its results are compared to three empirical correlations, showing significant differences and confirming that simplified methods can lead to inaccurate results.

An efficient sequential consistency implementation with dynamic race detection for GPUs

As GPUs are being used for general purpose computations, applications with different memory access requirements have emerged. In spite of the growing demand, only few GPU coherence protocols and memory models have been explored in research, and even fewer models have been implemented in products. However, in the CPU domain a diverse range of memory models for parallel programming have been proposed, which explore the interplay between performance and programmability.Sequential consistency (SC) is one of the strict memory models. It provides the most programmer intuitive execution of memory operation but it imposes strict ordering restrictions on memory operations that cause performance overhead. Hence, implementing and supporting SC is one of the most challenging tasks in any computing platform, and GPUs are no exception. As such in this paper, we propose a GPU architecture that implements SC memory model with minimal performance and power overhead. We achieve this goal by designing a mechanism to detect races between different streaming multiprocessors (SMs) dynamically at runtime. The race is detected using a signature-based mechanism to keep track of sets of unseen updates for each SM which significantly reduces the hardware implementation cost, with a small increase in invalidation traffic. Our experiments show that dynamic race detection can be used to implement sequential consistency with 5% performance overhead.

General-purpose DNA computation

General-purpose DNA computation

Computation harvesting from nature dynamics for predicting wind speed and direction.

Natural phenomena generate complex dynamics because of nonlinear interactions among their components. The dynamics can be exploited as a kind of computational resource. For example, in the framework of natural computation, various natural phenomena such as quantum mechanics and cellular dynamics are used to realize general purpose calculations or logical operations. In recent years, simple collection of such nature dynamics has become possible in a sensor-rich society. For example, images of plant movement that have been captured indirectly by a surveillance camera can be regarded as sensor outputs reflecting the state of the wind striking the plant. Herein, based on ideas of physical reservoir computing, we present a methodology for wind speed and direction estimation from naturally occurring sensors in movies. Then we demonstrate its effectiveness through experimentation. Specifically using the proposed methodology, we investigate the computational capability of the nature dynamics, revealing its high robustness and generalization performance for computation.

TEE-based General-purpose Computational Backend for Secure Delegated Data Processing

The increasing prevalence of data breaches necessitates robust data protection measures in computational tasks. Secure computation outsourcing (SCO) presents a viable solution by safeguarding the confidentiality of inputs and outputs in data processing without disclosure. Nonetheless, this approach assumes the existence of a trustworthy coordinator to orchestrate and oversee the process, typically implying that data owners must fulfill this role themselves. In this paper, we consider secure delegated data processing (SDDP), an expanded data processing scenario wherein data owners simply delegate their data to SDDP providers for subsequent value mining or other downstream applications, eliminating the necessary involvement of data owners or trusted entities to dive into data processing deeply. However, general-purpose SDDP poses significant challenges in permitting the discretionary execution of computational tasks by SDDP providers on sensitive data while ensuring confidentiality. Existing approaches are insufficient to support SDDP in either efficiency or universality. To tackle this issue, we propose TGCB, a TEE-based General-purpose Computational Backend, designed to endow general-purpose computation with SDDP capabilities from an engineering perspective, powered by TEE-based code integrity and data confidentiality. Central to TGCB is the Encryption Programming Language (EPL) that defines computational tasks in SDDP. Specifically, SDDP providers can express arbitrary computable functions as EPL scripts, processed by TGCB's interfaces, securely interpreted and executed in TEE, ensuring data confidentiality throughout the process. As a universal computational backend, TGCB extensively bolsters data security in existing general-purpose computational tasks, allowing data owners to leverage SDDP without privacy concerns.

SpikoPoniC: A Low-Cost Spiking Neuromorphic Computer for Smart Aquaponics

Aquaponics is an emerging area of agricultural sciences that combines aquaculture and hydroponics in a symbiotic way to enhance crop production. A stable smart aquaponic system requires estimating the fish size in real time. Though deep learning has shown promise in the context of smart aquaponics, most smart systems are extremely slow and costly and cannot be deployed on a large scale. Therefore, we design and present a novel neuromorphic computer that uses spiking neural networks (SNNs) for estimating not only the length but also the weight of the fish. To train the SNN, we present a novel hybrid scheme in which some of the neural layers are trained using direct SNN backpropagation, while others are trained using standard backpropagation. By doing this, a blend of high hardware efficiency and accuracy can be achieved. The proposed computer SpikoPoniC can classify more than 84 million fish samples in a second, achieving a speedup of at least 3369× over traditional general-purpose computers. The SpikoPoniC consumes less than 1100 slice registers on Virtex 6 and is much cheaper than most SNN-based hardware systems. To the best of our knowledge, this is the first SNN-based neuromorphic system that performs smart real-time aquaponic monitoring.

Synchronization Possibilities and Features in Java

Abstract In this paper we have discussed one of the greatest features of the general-purpose computer programming language –Java. This paper represents concepts of Synchronization possibilities and features in Java. Today’s operating systems support concept of “Multitasking”. Multitasking achieved by executing more than one task at a same time. Tasks runs on threads. Multitasking runs more than one task at a same time. Multitasking which means doing many things at the same time is one of the most fundamental concepts in computer engineering and computer science because the processor execute given tasks in parallel so it makes me think that are executing simultaneously. Multitasking is related to other fundamental concepts like processes and threads. A process is a computer program that is executing in a processor, while a thread is a part of a process that has a way of execution: it is a thread of execution. Every process has at least one thread of execution. There are two types of multitasking: process – based and thread – based. Process-based multitasking, means that on a given computer there can be more than one program or process that is executing, while thread-based multitasking, which is also known as multithreading, means that within a process, there can be more than one thread of execution, each of them doing a job and so accomplishing the job of their process. When there are many processes or many threads within processes, they may have to cooperate with each other or concurrently try to get access to some shared computer resources like: processor, memory and input/output devices. They may have to, for example: print a file in a printer or write and/or read to the same file. We need a way of setting an order, where processes and/or threads could do their jobs (user jobs) without any problem, we need to synchronize them. Java has built-in support for process and thread synchronization, there are some constructs that we can use when we need to do synchronization.This paper, a first phase discussed the concept of Parall Programming, threads, how to create a thread, using a thread, working with more than one thread. Second phase is about synchronization, what is in general and in the end we disscused the synchronization possibilities and feautures in Java.

DNA-based programmable gate arrays for general-purpose DNA computing.

The past decades have witnessed the evolution of electronic and photonic integrated circuits, from application specific to programmable1,2. Although liquid-phase DNA circuitry holds the potential for massive parallelism in the encoding and execution of algorithms3,4, the development of general-purpose DNA integrated circuits (DICs) has yet to be explored. Here we demonstrate a DIC system by integration of multilayer DNA-based programmable gate arrays (DPGAs). We find that the use of generic single-stranded oligonucleotides as a uniform transmission signal can reliably integrate large-scale DICs with minimal leakage and high fidelity for general-purpose computing. Reconfiguration of a single DPGA with 24 addressable dual-rail gates can be programmed with wiring instructions to implement over 100 billion distinct circuits. Furthermore, to control the intrinsically random collision of molecules, we designed DNA origami registers to provide the directionality for asynchronous execution of cascaded DPGAs. We exemplify this by a quadratic equation-solving DIC assembled with three layers of cascade DPGAs comprising 30 logic gates with around 500 DNA strands. We further show that integration of a DPGA with an analog-to-digital converter can classify disease-related microRNAs. The ability to integrate large-scale DPGA networks without apparent signal attenuation marks a key step towards general-purpose DNA computing.

Efficient and Secure Skyline Queries Over Vertical Data Federation

Skyline is a primitive operation in multi-objective decision applications and there is a growing demand to support such operations over a data federation, where the entire dataset is separately held by multiple data providers (a.k.a., silos). Data federations notably increase the amount of data available for data-intensive applications such as commercial recommendation and location based services. Yet they also challenge the conventional implementation of skyline queries because the raw data cannot be shared within the federation and the secure computation cross silos can be two or three orders of magnitude slower than plaintext computation. These constraints render existing solutions inefficient on data federation. In this work, we propose a novel local dominance based framework for efficient skyline queries over a vertical data federation. We decompose the skyline query into plaintext local dominance computations and secure result aggregations, which can perform as many computations in plaintext as possible without compromising security. We further propose a dedicate private set intersection based algorithm to accelerate the query processing. Extensive evaluations on both synthetic and real-world datasets show that compared with general-purpose secure multi-party computation techniques, our solutions reduce the time cost by up to 35.4× and communication cost by two orders of magnitude respectively.

Fish Monitoring from Low-Contrast Underwater Images

A toolset supporting fish detection, orientation, tracking and especially morphological feature estimation with high speed and accuracy, is presented in this paper. It can be exploited in fish farms to automate everyday procedures including size measurement and optimal harvest time estimation, fish health assessment, quantification of feeding needs, etc. It can also be used in an open sea environment to monitor fish size, behavior and the population of various species. An efficient deep learning technique for fish detection is employed and adapted, while methods for fish tracking are also proposed. The fish orientation is classified in order to apply a shape alignment technique that is based on the Ensemble of Regression Trees machine learning method. Shape alignment allows the estimation of fish dimensions (length, height) and the localization of fish body parts of particular interest such as the eyes and gills. The proposed method can estimate the position of 18 landmarks with an accuracy of about 95% from low-contrast underwater images where the fish can be hardly distinguished from its background. Hardware and software acceleration techniques have been applied at the shape alignment process reducing the frame processing latency to less than 0.5 us on a general purpose computer and less than 16 ms on an embedded platform. As a case study, the developed system has been trained and tested with several Mediterranean fish species in the category of seabream. A large public dataset with low-resolution underwater videos and images has also been developed to test the proposed system under worst case conditions.

Machine Learning-Based Seismic Damage Assessment of Residential Buildings Considering Multiple Earthquake and Structure Uncertainties

Wood-frame structures are used in almost 90% of residential buildings in the United States. It is thus imperative to rapidly and accurately assess the damage of wood-frame structures in the wake of an earthquake event. This study aims to develop a machine-learning-based seismic classifier for a portfolio of 6,113 wood-frame structures near the New Madrid Seismic Zone (NMSZ) in which synthesized ground motions are adopted to characterize potential earthquakes. This seismic classifier, based on a multilayer perceptron (MLP), is compared with existing fragility curves developed for the same wood-frame buildings near the NMSZ. This comparative study indicates that the MLP seismic classifier and fragility curves perform equally well when predicting minor damage. However, the MLP classifier is more accurate than the fragility curves in prediction of moderate and severe damage. Compared with the existing fragility curves with earthquake intensity measures as inputs, machine-learning-based seismic classifiers can incorporate multiple parameters of earthquakes and structures as input features, thus providing a promising tool for accurate seismic damage assessment in a portfolio scale. Once trained, the MLP classifier can predict damage classes of the 6,113 structures within 0.07 s on a general-purpose computer.

ALGORITHM FOR APPLICATION OF INFORMATION FOR MANAGEMENT OF USERS SPATIAL DISPOSITION IN THE PROCESS OF AUTOMATED SOFTWARE-DEFINED RADIO COMMUNICATION NETWORK IMPLEMENTED BY ORTHOGONAL FREQUENCY DIVISION AND MULTIPLEXING

A software-defined radio (SDR) system is a radio communication system which uses software for the modulation and demodulation of radio signals. An SDR performs significant amounts of signal processing in a general purpose computer, or a reconfigurable piece of digital electronics. SDR can talk and listen to multiple channels at the same time, also it can be quickly and easily upgraded with enhanced features. In fact, the upgrade could be delivered over-the-air In the long run, SDR is expected to become the dominant technology in radio communications

Trapezius activity during personal computer work with progressive addition lenses for general purpose and for computer work in neophytes.

This study analysed the impact of general purpose progressive addition lenses (GP-PALs) and computer progressive addition lenses (PC-PALs) on the activity of the trapezius muscle during computer operation. In this randomised, single-blinded, crossover study, surface electromyography (SEMG) signals were recorded bilaterally from the trapezius muscle during a 30-min computer task performed wearing different presbyopic corrections. The amplitude probability distribution function and its percentiles, gap frequency, muscular rest time and sustained low-level muscle activity periods were analysed in 32 subjects with artificially induced presbyopia. Subjectively perceived differences in vision and postural load between lenses were evaluated using a seven-item questionnaire (non-standardised, visual analogue scale ranged from 1 [bad] to 100 [good]). Considering the SEMG data, no significant difference in the muscular activity of the trapezius muscle was observed when using GP-PALs or PC-PALs for computer operation. However, PC-PALs showed statistically and clinically significantly higher results for subjectively perceived visual quality (78.4-31.3; p < 0.001), spontaneous tolerance (79.2-31.3; p < 0.001) and field of view (75.9-23.5; p < 0.001) compared with GP-PALs. Even though the electromyographic approach did not show a significant differentiation between the lenses, the subjective evaluation was clearly in favour of PC-PALs. Eye care practitioners should always take an occupational history of presbyopes, ask about the workplace situation and consider the use of PC-PALs.